IP Portfolio

IP Portfolio

SerDes is a cornerstone building block in the present and futuristic high performance computing systems, delivering scalable bandwidth, reduced latency, reduced complexity, and efficient, resilient connectivity — that plays a critical role across computing, networking, and storage constituents of HPC, AI, edge computing and 5G&6G communication.

Deliverables

  • User & integration guides
  • Netlist & timing library
  • Register map & Verilog
  • IBIS-AMI models
  • LEF views
  • LVS & DRC reports
  • Silicon proven data

Available nodes

16G – TSMC 28HPC/HPC+ 10G – TSMC 65GP/55LP 8G – TSMC 65GP/28HPC/HPC+, GF 28SLP 5G/2.5G – TSMC 28HPC/HPC+, 65GP, 55LP, GF 28SLP

Unprecedented power savings & performance.

PCI Express PHY

PCIe 4.0/3.0/2.0 PHY – low latency, small form factor, PIPE4.3 compliant.

Key features

  • Quad PCIe 16/8/5/2.5 Gbps per lane
  • On‑chip termination calibration
  • 3‑tap Tx FIR & CTLE up to 12dB
  • CDR & 3‑tap Rx DFE
  • Bifurcation/quadfurcation modes
  • SRnS support & ESD structures

Environment

  • Wide temp range -40°C to +125°C
  • Programmable loopback modes
  • Auto calibration (pre‑emphasis, DFE, offset)
  • Lowest latency

PCIe Gen5

32Gbps, TSMC 12nm FFC

PCIe Retimer

Multi-rate 2.5G-16G

PCIe Gen4

16Gbps, multiple nodes

USB PHY

USB 3.1 Gen2/1 PHY – PIPE4.2 compliant, low power, 10GHz PLL.

Configurations

  • Parallel data widths 8/16 bits
  • QUAD (4TX/4RX) or single lane
  • Support 1m cable & signal loss detection
  • Programmable multi‑tap de‑emphasis

Clock & jitter

  • High speed low jitter 10GHz PLL
  • 0.17UI jitter performance

USB 3.2

20Gbps, Type-C compatible, backward compatible to USB 3.1

USB 4.0

40Gbps, TSMC N12 FFC+, Type-C with DisplayPort tunneling

MIPI MPHY Gear4

HS Gear4, multi‑lane, PWM G1‑G7, adopted by PCI‑SIG & USB‑IF.

Highlights

  • Supports G4A/B, backward compatible
  • PWM G1-G7 for low speed
  • HS burst, STALL, SLEEP, HIBERN8
  • Built‑in ref‑less oscillator
  • 2‑lane config up to 23.32Gbps

Deliverables

  • GDSII, LEF, CDL, Liberty
  • Verilog + AFE models
  • Full datasheet & integration note
✔️ Supported protocols: CSI‑3, DigRF, LLI, UniPro / M‑PCIe, SSIC

Multi‑Standard SerDes

Covering PCIe, USB, SATA, 10G-KR, XAUI, DisplayPort, EPON & more.

Supported standards (selection)

StandardData rate (Gbps)
PCIe Gen4/3/2/116/8/5/2.5
USB 3.1 Gen2/110/5
SATA Gen3/2/16/3/1.5
10GBase‑KR / XFI10.3125
XAUI / 10GBase‑KX43.125
DisplayPort8.1 – 1.6
EPON/GPON/XGPON1.25/2.488/9.95

Offerings

  • Configurable parallel rate 8‑80 bit
  • Input ref 5MHz – 2.5/5/10G
  • Multi‑tap Tx FIR & CTLE
  • CDR, DFE, loopback, bifurcation
  • Temp range -40°C to 125°C

32G Multi-protocol SerDes

For 5G wireless, data center, and high-speed wireline applications

PLL Products

Digital PLL

  • Type II, 3rd order low jitter PLL
  • Auto calibration (process & temp)
  • Programmable via CSR registers
  • Quadrature clocks 1.25/2.5/5GHz

Analog PLL

  • 16GHz / 10GHz PLL for PCIe/SerDes
  • 8/10/16GHz quadrature clocks
  • Ultra low jitter, -40°C to 125°C
  • Available in 28nm multiple nodes

10G Ethernet PHY

1-port/4-port, 4-speed (1G/2.5G/5G/10G) with 100m reach on Cat6a

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